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Thanasin (Thomas) Bunnam

Memristor modelling.

Email: [email protected]

Supervisor

Project description

I am currently working on memristor modelling to include its temperature effect. It is the starting point of investigating temperature compensation. This is important in applications such as analog memory.

I am in a working group which is focusing on the Tsetlin machine, an alternative high-efficient machine learning approach. My role is to design and integrate a memory block into our hardware design for fabrication.

I am also a member of time-domain power-elastic perceptron for machine learning research. My role is to model our PWM perceptron hardware to implement a neural network to solve problems such as MNIST.

Publications

  • Bunnam T, Soltan A, Sokolov D, Yakovlev A. Pulse controlled memristor-based delay element. In: 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS). 2017, Thessaloniki, Greece: IEEE.
  • Bunnam T, Soltan A, Sokolov D, Yakovlev A. An Excitation Time Model for General-purpose Memristance Tuning Circuit. In: 2018 IEEE International Symposium on Circuits and Systems (ISCAS). 2018, Florence, Italy: IEEE.
  • Bunnam T, Soltan A,Sokolov D,Maevsky O, Yakovlev A. Toward Designing Thermally-Aware Memristance Decoder. In: IEEE Transactions on Circuits and Systems I: Regular Papers 2019, 66(11), 4337-4347.
  • Mileiko S,Bunnam T,Xia F,Shafik R,Yakovlev A, Das S. Neural Network Design for Energy-Autonomous AI Applications using Temporal Encoding. arXiv e-prints arxiv.org/abs/1910.07492, 15 October 2019.

Interests

  • Memristor
  • Memristive circuit
  • Memristor temperature modelling
  • Analog memory
  • Delay element
  • Machine learning
  • Tsetlin machine

Qualifications

  • B.Eng. (Computer Engineering), Mahidol University, Thailand, 2005.
  • M.Eng. (Computer Engineering), Chulalongkorn University, Thailand, 2009.